10-15-2014, 06:12 PM
Maga, I won't be building in eight bit, I'm just going to jump straight from four to sixteen bit. Prototyping in eight bit takes much longer than in four bit so I might as well just use four. I chose four because it's functional enough to allow for all the quirks in the large operations to present themselves, but quick enough that I can just blaze through it.
Another thing I just realized is that my computer can also run on much larger word sizes than sixteen bit without any issues in the instruction set (except one very tiny one which makes it so that writing a nonzero constant to registers must be done in more than one clock.) So it's instruction efficiency will get better as it becomes larger. This computer is really a number cruncher or digital signal processor of some kind. I do have one open space in my instruction set... a fused multiply-add could fit in there quite nicely, and will easily combine with the existing multiplier... I personally will not build this any larger than 16 bit, but it can easily be done. I also forgot to mention that it no longer naturally analyses in two's compliment or floating point. That must be done by the programmer.
I don't think I could ever pass the actual trial, I'm just so slow at building things...
LD, if you notice, my school application was for piston extensions greater than two and tree farming. These were actually what made me build the oscilloscope, which led to the idea for this computer. Neither the tree farm, nor the piston extension was ever figured out.
The Boolean unit is separate from the adder because of how the opcodes are shared. There are only like four booleans it does, and the adder does three types of add and the xor, so separation of units allows for me to use parallel decoding in the adder for it's four and parallel decoding in the Boolean unit for it's whole system. This takes a single tick of delay out of the adder, two ticks out of the Boolean unit, and makes both units extremely simplified in comparison.
Bit too old for my parents to buy it, bit too young to work as an intern, and I really don't want to get an associate's degree in hamburger flipping at McDonald's while I wait interim.
Another thing I just realized is that my computer can also run on much larger word sizes than sixteen bit without any issues in the instruction set (except one very tiny one which makes it so that writing a nonzero constant to registers must be done in more than one clock.) So it's instruction efficiency will get better as it becomes larger. This computer is really a number cruncher or digital signal processor of some kind. I do have one open space in my instruction set... a fused multiply-add could fit in there quite nicely, and will easily combine with the existing multiplier... I personally will not build this any larger than 16 bit, but it can easily be done. I also forgot to mention that it no longer naturally analyses in two's compliment or floating point. That must be done by the programmer.
I don't think I could ever pass the actual trial, I'm just so slow at building things...
LD, if you notice, my school application was for piston extensions greater than two and tree farming. These were actually what made me build the oscilloscope, which led to the idea for this computer. Neither the tree farm, nor the piston extension was ever figured out.
The Boolean unit is separate from the adder because of how the opcodes are shared. There are only like four booleans it does, and the adder does three types of add and the xor, so separation of units allows for me to use parallel decoding in the adder for it's four and parallel decoding in the Boolean unit for it's whole system. This takes a single tick of delay out of the adder, two ticks out of the Boolean unit, and makes both units extremely simplified in comparison.
Bit too old for my parents to buy it, bit too young to work as an intern, and I really don't want to get an associate's degree in hamburger flipping at McDonald's while I wait interim.