Anyone want to work with me?

[Konstacon]

I know some of you think I ain't smart.

...

Who wants to work with me on a CPU?

It is going to be accumulator architecture. If you don't know what that means, wikipedia is your friend.

I planned out the IS. There is a 5 bit opcode, 1 bit RAM Pointer / address toggle bit, and 8 bit immediate. This leaves for 32 beautiful operations.

The four registers are A, X, SP, IP, which are accumulator, index, stack pointer, and instruction pointer, respectively. These registers are not treated as arguments in accumulator architecture, but rather the base of load, store, and transfer commands. For example, LDA and LDX are different commands.

The CPU's name is going to be "AMP" which stands for 
    - Accumulative
    - Mono-indexed
    - Processor

Which means it is an accumulator architecture with only one index register, as supposed to the two index registers, X and Y, in the MOS 6502. Also, it is a processor, not a meatloaf.

Looking for a friendly person who understands my jargon.

Bananas are accepted, too.

[Nickster258]

Bananas are accepted, too.

I'm in.

[LordDecapo]

Eh, I still don't like the amount of memory access that kinda system forces you to do.. as if u want to work on more then 2 values, u have to load and store the old and new values. So u can get fast single functions. but anything more than that and you have to go to memory... wouldn't be too bad if you had a super close cache (like a 1 cycle penalty on a pipelined accumulator)