05-24-2017, 08:56 PM
(This post was last modified: 05-25-2017, 01:00 AM by LordDecapo.)
Hello All!!!
We will be hosting a CPU buildoff this weekend and its open to anyone wanting to join! Simply read the rules and details below and reply to this thread with a simple "I accept the challenge", show up, and you will be good to go
For this contest you are allowed to bring along just an ALU and an Instruction Set / Architecture idea you want to build. They must be at least a 4bit CPU. IS may be any size.
This ALU Can not have an encoder/decoder on its control lines and can not have a register file connect, however it may have Forwards and L/R Shifts installed. You will have 6 hours to do this. The build-off will be hosted on the new Event/Competition plot area on Saturday May 27th @ 11:00AM-ish through 5:00PM-ish.
The scoring will be based on the performance of your CPU running 2 out of 3 (Doing all 3 gets bonus points) the following programs. Examples below are simply that examples, you can also do any other code if you want. As long as they meet the same desired result.
Good luck everyone!
We will be hosting a CPU buildoff this weekend and its open to anyone wanting to join! Simply read the rules and details below and reply to this thread with a simple "I accept the challenge", show up, and you will be good to go
For this contest you are allowed to bring along just an ALU and an Instruction Set / Architecture idea you want to build. They must be at least a 4bit CPU. IS may be any size.
This ALU Can not have an encoder/decoder on its control lines and can not have a register file connect, however it may have Forwards and L/R Shifts installed. You will have 6 hours to do this. The build-off will be hosted on the new Event/Competition plot area on Saturday May 27th @ 11:00AM-ish through 5:00PM-ish.
The scoring will be based on the performance of your CPU running 2 out of 3 (Doing all 3 gets bonus points) the following programs. Examples below are simply that examples, you can also do any other code if you want. As long as they meet the same desired result.
- Fibonacci:
Starts at 0,1 and goes until it overflows, then either resets or halts. Score for big will be calculated with the average tick per iteration of fib. This example does 2 iterations per loop, so you would count the total length of the loop, (lines 3-9) which is 6 cycles, so given a 10 tick clock you would spend 60 ticks in the loop, with 2 iterations per loop, that gives you a score of 30 ticks. Example:
- Clear your Registers
- Load an Immediate of 1 into register A
- #START
- Add Register A with Register B
- Branch to #OVERFLOW If_Cout
- Add Register B to Register A
//Option 1:
- Branch to #OVERFLOW If_Cout
- Jump to #START
//Option 2:
- Branch to #START If_NOT_Cout
- not needed
#OVERFLOW//with halt:
- Halt
//with reset:
- Jump to Line 1
- Sequential Squares:
Find the Squares of the numbers 1-4 for 4 bit CPUs and 1-8 for 8 bit CPUs. Optional challenge: store squares in there respective roots RAM address (Such, 1^2 would be stored in RAM address 1, 2^2 would be stored in RAM address 2, 3^2 would be stored in RAM address 3.Example: (does not show the storing to RAM, HINT: use your A register as a RAM Pointer). Scoring for this program will be nearly the same as fib, average ticks per iteration. This example has 1 iteration per loop. So given the following example, we have the loop running from lines 5 to 9. That is 5 total cycles, if we again use a 10 tick clock, this program would have a score of 50 ticks. Example:
- Clear registers
- Load an Immediate of 1 into Register A
- Add Register A to Register B store to Register B
- Add Register A to Register C store to Register C
//#START of loop, 1^1 is now in B.
- Add Register A to Register B store to Register B
- Increment Register A
- Increment Register C
- Add Register C to Register B Store to Register B
- Jump to #START
- List Comparison:
Compare the contents of 2 Lists. [9,8,2,5,9,1,1,2] and [9,8,2,5,9,0,1,2]. I will give 3 separate examples for this one. Two with a CPU that has 16 bytes of RAM or more, both with and without pointers. One that does not require RAM but does require a bit more instruction memory as the same lists will be contained in a series of Load Immediate instructions rather than load from RAM. The score on this will be similar to the rest, avg number of ticks per pair of elements compared. Instructions that are *'ed are only needed if your using pointers for Load/Store, Pointers also require 5 registers compared to 3 without... Example:
With RAM Load/Store Poiners:
- Preload your RAM if you have at least 16 bytes. with the following numbers in order from address 0 in RAM to address 15: 7, 8, 3, 5, 9, 1, 1, 2, 9, 8, 2, 2, 9, 0, 1, 2. You may do this preload by hand and put the data in manually into your RAM or use a PROM for this if you want to just read from it. Or any other way you like.
- Clear Registers
- Load an immediate of 8 into Register B
- Load an Immediate of 8 into Register C
- #START
- Subtract/Compare Register C from/with Register A (Do not store Result)
- Branch to #CHECKED if C and A came back Equal (If0+!Cout... you don't really need the !Cout for this particular case tho)
- Load @A (Register A as a pointer) to Register C
- Increment Register A
- Load @B (Register A as a pointer) to Register D
- Increment Register B
- Subtract/Compare (same thing) Register C from D
- Branch to #START If C and D came back Equal
- Halt or end or something.
- #CHECKED
- Halt or end or something different.
- Without RAM Load/Store Pointers or with Load Immediates:
Good luck everyone!
Im µCapo