@crim, what you're actually suggesting with that example is a hardware description language.
I'd suggest making a place-and-route / synthesis tool for redstone which parses verilog code.
Depending on how feature-rich the tool is, it could actually be a pretty exciting development for the community. Imagine the coverage online of people generating open source verilog cpus in minecraft, just for the "cool" factor of seeing it all laid out in three dimensions.
You could even have 3 different PAR algorithms tailored to the different cpu building paradigms. (horiz, vert, diag)
If each version is optimised reasonably well, people could be able to contrast identical designs against different build styles.
I'd suggest making a place-and-route / synthesis tool for redstone which parses verilog code.
Depending on how feature-rich the tool is, it could actually be a pretty exciting development for the community. Imagine the coverage online of people generating open source verilog cpus in minecraft, just for the "cool" factor of seeing it all laid out in three dimensions.
You could even have 3 different PAR algorithms tailored to the different cpu building paradigms. (horiz, vert, diag)
If each version is optimised reasonably well, people could be able to contrast identical designs against different build styles.