08-20-2013, 10:08 AM
Hello everyone, I just wanted to post this thread of me thinking about somethin for quite a while now.
As you all know, the level we are at with programming our MC Computers are pretty low level. To be spesific, we are just programming machine code, right into the memory, with 1's and 0's. The only way we could get the high level programming experience is by developing fast and reliable MC Computers. Now here are (what I think) the ways we can make them faster, and what people seem to be doing wrong (in my opinion again):
Tradeoffs at ISA and Microarchitecture (uArch) Level
There are quite a few ways we can improve our Instructions. But the question is, were do we start? Lets think of a complex instruction, for example branching. People have been using branching in MC computers for quite some time now. But is there a better way of doing it? What we basically do (generally speaking) is say "Branch to the instructions at line 22 if Register A's content is equal to the contents of the Register B" Well this is simple right? We just send the "22" to the Program Counter register and demux between program counter value and the IP (Instruction Poiter) we defined in the program. If the given condition is true, PC register is loaded with "22", if not, we continue the normal cycle. Now, this is one way of doing it. But there are several more ways to perform "Conditional Execution". One is branch predictors, which is not very easy in MC :D. The other and the simpler way of doing is, is what its called using "Condition Codes" or the way ARM Architecture describes it, "Conditional Execution". Basically there is one bit, that tells if the following code is going to be executed or not. This is way simpler, becouse it needs less hardware, and it makes programmers job easier.
Another thing I want to point out is Instruction Sets. Now lets be honest, 70% of the people do not know how to make Instruction Sets, that are optimized for their needs, and the capabilities of their hardware. Now please someone tell me, why would you use a CICS architecture while you do not know how to do multiplication, calls/interrupts, and such complex tasks. Why would you acquire such complex tasks if it cant even be programmed efficiently for a simple fibonacci sequence. So this is my point here, I really think that it is pretty idiotic, to go for a CICS arch. before we make our computers practical, by that I mean it should actually take max. 2 seconds to execute a single instruction. So what I am trying to say, is people are using diffrent IS's that actually does not make sense, becouse it is not well optimized for their needs and their hardware, they give them names like SAARMCISC or something, so please please please, if you are reading this, think on your IS more deeper before you start your next Computer project :))
We could even try diffrent uArch systems, such as dataflow, or a more proper Von Neumann then we are using today.
If we want to program our MC Computers more efficiently and with more High-Level we should fix what is lying underneath, the ISA and uArch!
I could talk about this more and more (like how people put 9856748 bytes of RAM and only use 3 of it, how people put all the logic operations in their IS's and much more :D) but it would take a book for me to do that. So instead, please tell me what is your take on this one, and lets discuss on those. Thanks for reading this big mess text :D
Leave yo comments!
As you all know, the level we are at with programming our MC Computers are pretty low level. To be spesific, we are just programming machine code, right into the memory, with 1's and 0's. The only way we could get the high level programming experience is by developing fast and reliable MC Computers. Now here are (what I think) the ways we can make them faster, and what people seem to be doing wrong (in my opinion again):
Tradeoffs at ISA and Microarchitecture (uArch) Level
There are quite a few ways we can improve our Instructions. But the question is, were do we start? Lets think of a complex instruction, for example branching. People have been using branching in MC computers for quite some time now. But is there a better way of doing it? What we basically do (generally speaking) is say "Branch to the instructions at line 22 if Register A's content is equal to the contents of the Register B" Well this is simple right? We just send the "22" to the Program Counter register and demux between program counter value and the IP (Instruction Poiter) we defined in the program. If the given condition is true, PC register is loaded with "22", if not, we continue the normal cycle. Now, this is one way of doing it. But there are several more ways to perform "Conditional Execution". One is branch predictors, which is not very easy in MC :D. The other and the simpler way of doing is, is what its called using "Condition Codes" or the way ARM Architecture describes it, "Conditional Execution". Basically there is one bit, that tells if the following code is going to be executed or not. This is way simpler, becouse it needs less hardware, and it makes programmers job easier.
Another thing I want to point out is Instruction Sets. Now lets be honest, 70% of the people do not know how to make Instruction Sets, that are optimized for their needs, and the capabilities of their hardware. Now please someone tell me, why would you use a CICS architecture while you do not know how to do multiplication, calls/interrupts, and such complex tasks. Why would you acquire such complex tasks if it cant even be programmed efficiently for a simple fibonacci sequence. So this is my point here, I really think that it is pretty idiotic, to go for a CICS arch. before we make our computers practical, by that I mean it should actually take max. 2 seconds to execute a single instruction. So what I am trying to say, is people are using diffrent IS's that actually does not make sense, becouse it is not well optimized for their needs and their hardware, they give them names like SAARMCISC or something, so please please please, if you are reading this, think on your IS more deeper before you start your next Computer project :))
We could even try diffrent uArch systems, such as dataflow, or a more proper Von Neumann then we are using today.
If we want to program our MC Computers more efficiently and with more High-Level we should fix what is lying underneath, the ISA and uArch!
I could talk about this more and more (like how people put 9856748 bytes of RAM and only use 3 of it, how people put all the logic operations in their IS's and much more :D) but it would take a book for me to do that. So instead, please tell me what is your take on this one, and lets discuss on those. Thanks for reading this big mess text :D
Leave yo comments!
