05-04-2013, 09:55 PM
(This post was last modified: 05-04-2013, 09:56 PM by Xeomorpher.)
So, a while ago, I saw that CXgamer had made a repeater only half adder, which worked by utilising exact timings, and locks as well as a clock signal to produce a pulsed output, I then made a less flat (CX's was 1 high), but faster version, and then made a full adder. After playing for some time with that, I hooked up carries, and made the next adder reclock upon receipt of carry, thus making carrying adders. I then synced it all up, put it on a centeral clock, and made a fully functioning repeater only adder. After which, I began to toy with the idea of making a CPU with repeaters. The largest concern that I had, was making memory work. This would be very difficult, since it needed a constant on signal, as pulses would not work, making a constant state inverter is VERY hard with repeaters, since once you have a repeater in a 1 state, you cannot lock it to a 0. The solution to this, which I found, was to have several clocks, and utilising some very mind f*ck timing logic, I used them to create register cells, which could be written to, and preserved data (huzzah) I then created a logic layer on top of my adders, added some repeater muxes, bussed it all up ... spent hours timing it and here it is! ![Big Grin Big Grin](https://forum.openredstone.org/images/smilies/biggrin.png)
![[Image: 5xhENLf.png]](http://i.imgur.com/5xhENLf.png)
![[Image: UKG4urO.png]](http://i.imgur.com/UKG4urO.png)
Core of an adder
![[Image: lUBy4r6.png]](http://i.imgur.com/lUBy4r6.png)
Register cell
![[Image: beQWjcu.png]](http://i.imgur.com/beQWjcu.png)
Controls
![Big Grin Big Grin](https://forum.openredstone.org/images/smilies/biggrin.png)
![[Image: 5xhENLf.png]](http://i.imgur.com/5xhENLf.png)
![[Image: UKG4urO.png]](http://i.imgur.com/UKG4urO.png)
Core of an adder
![[Image: lUBy4r6.png]](http://i.imgur.com/lUBy4r6.png)
Register cell
![[Image: beQWjcu.png]](http://i.imgur.com/beQWjcu.png)
Controls