08-30-2014, 06:40 PM
(This post was last modified: 08-30-2014, 06:41 PM by AFtExploision.)
The v4 is the fourth iteration of my CLE hexadecimal adder. The original and modified v4 are both 15 ticks sync for 8 bits, the torchless version is 17 ticks for 8 bits (Prototype).
The v4.5 is 13 ticks sync for 8 bits, and the 16 bit version (using regular CLE towers, bigger than needed to save speed) is 14 ticks sync.
They are solid state, torchless has 2 tick throughput, torched versions have 3 tick throughput iirc
Pics:
8 bit v4 (with input inverters)
![[Image: 6qd6SUQ.png]](http://i.imgur.com/6qd6SUQ.png)
The v4.5 (original, 2 bits)
![[Image: n6UOfQ6.png]](http://i.imgur.com/n6UOfQ6.png)
The 16 bit v4.5
![[Image: JWjzLOb.png]](http://i.imgur.com/JWjzLOb.png)
Torchless v4
![[Image: HUGVe2K.png]](http://i.imgur.com/HUGVe2K.png)
The v4.5 is 13 ticks sync for 8 bits, and the 16 bit version (using regular CLE towers, bigger than needed to save speed) is 14 ticks sync.
They are solid state, torchless has 2 tick throughput, torched versions have 3 tick throughput iirc
Pics:
8 bit v4 (with input inverters)
The v4.5 (original, 2 bits)
The 16 bit v4.5
Torchless v4
![[Image: corpse.jpg]](http://img.photobucket.com/albums/v191/legofreak1988/avy-sig/corpse.jpg)
