07-23-2013, 11:36 PM
(07-23-2013, 06:52 PM)CMOSprinkles Wrote: I'm assuming that stands for 'Optimal Instruction Set Computing', which is a very bold claim to make. Although, I also assume that it would be identical to MISC, 'Minimal Instruction Set Computing', which is a concept that has been done. Anyway, send me a link to his thread about it and I will look into it. If he does not have a thread for it, ask him to make one. Thanks Bill!Close it stands for Optimised instruction set computing,
Utilising IS that are less than 48 bits in length but behave
Like RISC instructions, A+B for example in CISC might take
2 or 3 instructions but in RISC or OISC it takes 1 instruction.
SAC utilising OISC has 40 or so bits of IS per line.