04-09-2015, 12:04 AM
(This post was last modified: 04-09-2015, 12:06 AM by LordDecapo.
Edit Reason: added the "app"
)
(04-08-2015, 11:20 PM)tyler569 Wrote: Lord: can I get some idea of what your IS looks like so I can tell if it's a good candidate before telling you to do the working things?
https://docs.google.com/spreadsheets/d/1...sp=sharing
that is the docs its on, the IizR14-IZ/RALPH2 sheet is the IizR14 IS,,, the missing line in Mode 0, and the empty DMA inst will be fixed and finished tonight, if not, then tomorrow after work. As i am solidifying the IS since Tuchi's RALPHiz2 CPU will be using the same IS and architecture, just implemented at an 8 tick rather then 6 tick clock, and be his own implementation of the ISA.
That reason is more so a cool thing to see u make it for it, since u will have 2 ppl that will use it.. also i plan to make my CPU in Verilog and program a FPGA to run it,,,, so ur program would be used there too!
it would be used A LOT just saying
----------- oh and this
Name: LordDecapo
CPU/Architecture Name (If any): IizR
Where is the CPU on the server? (Warp is probably easiest): warp iizr14
Pastebin link to IS/ASM/Documentation (the more the better): ^^ above, and have other documentation if you would like, such as how the pipeline uses inst.. if you would get into like optimization.
Why should I choose your IS/CPU?: cause u love me... and cause it would get a bunch of use on others as well as my own projects.
Further comments? (If any): umm nope