A 16 LUT FPGA (Field Programmable Gate Array)

[killing_you_guy_]

I built an FPGA out of redstone.
An FPGA (Field Programmable Gate Array) is a device that can be configured to act as a series of connected logic gates. It is composed of LUTs (Look-Up Tables) which can be configured to act as any logic gate and interconnect which transports data between logic gates.

The build is shown below:

The programming circtuitry/inputs are in white, the actual LUTs are in red, the interconnect is in yellow, and the various control/clock circuitry is blue/green/orange.

I managed to program the FPGA to act as a full adder by adding input levers and lamps on the interconnect. This only used 6 of the 16 LUTs, so it should be possible to make a 2 bit adder out of this too.


I believe this may be the least practical way anyone has implemented a 1 bit adder. It uses hundreds of gates and 80 bits of ram to add two bits in no less than 96 ticks.

[LambdaPI]

That's really cool. I was wondering, is it programmable like by sending some kind of serial pulse through the whole thing? Or do you have to go to each gate and route and set it manually?

[killing_you_guy_]

Each LUT has a 4 bit address and a whole bunch of data lines, so you can set all of the data lines and the address and the LUT will update when the click signal is pulsed.
Version 2 uses serial programming, which is a lot nicer.

[Tommyand]

this is cool! i was trying to do something similar awhile back, though I was specifically trying to create fully tilable slices with additional control bits to cut off the two way repeaters, etc. i copied the more recent serial-based designs to my current plot (ign: kitlith), but i never finished routing them. just creating the LUT/memory circuitry and planning out how the interconnects would tile. (possibly bad planning too). only thing of this variety i actually finished was a ROM based one that I didn't bother to copy over..

[Trecar]

That is a very interesting build! Please post Version 2 when/if it is ready. On a side note, that is also the most gigantic full adder I have ever seen Maybe u can make it faster with pipelining xD. No seriously,
i think you might be able to save a bunch of ticks if you parallelize the hell out of it.
A CPU, or just an ALU (But like, 4 Bit pls) with a Minecraft FPGA would be extremely cool, seriously.