07-23-2013, 11:46 PM
(This post was last modified: 07-25-2013, 12:21 PM by Billman555555.)
Hello people,
I was playing on build and Craftriot suggested a new
IS coding called OISC or 'Optimised Instruction Set Computing'
Utilising a larger number of bits in a Line of code than CISC but
Behaving just like CISC instructions. This is currently WIP but
Will be finished at the same time as SAC. You may implement
This ISC but you will need.
A video will be coming soon with more SAC progress,
Bai.
I was playing on build and Craftriot suggested a new
IS coding called OISC or 'Optimised Instruction Set Computing'
Utilising a larger number of bits in a Line of code than CISC but
Behaving just like CISC instructions. This is currently WIP but
Will be finished at the same time as SAC. You may implement
This ISC but you will need.
Code:
Dual read registers
Comparability of 15 to 255 RAM slots
ALU with 7 - 8 control bits
Multiple command control bits (If using GPU, serial, ect)
And a way to port this to CISC if required
Bai.