I came up with my own standardized instruction set for any future CPUs I will build, including ones for REDbit. The instruction set is as follows:
Functions:
Registers:
Conditions:
**Prompt tells the interpreter to halt until the user tells it to continue (ie. with a button)
- Function: 4 bits
Register A: 4 bits
Register B: 4 bits
Register C: 4 bits
Condition: 3 bits
Line A: x bits
Line B: x bits
PROG Value: y bits
Functions:
- 0000 - ADD (C = A + B)
0001 - SUBTRACT (C = A - B)
0010 - SHR (C = A + B >>)
0011 - RAND (C = rand())
0100 - OR (C = A OR B)
0101 - NOR (C = A NOR B)
0110 - AND (C = A AND B)
0111 - NAND (C = A NAND B)
1000 - XOR (C = A XOR B)
1001 - XNOR (C = A XOR B)
1010 - == (C = A == B)
1011 - != (C = A != B)
1100 - < (C = A < B)
1101 - > (C = A > B)
1110 - <= (C = A <= B)
1111 - >= (C = A >= B)
Registers:
- 0000 - FALSE
0001 - TRUE
0010 - -1
0011 - 0
0100 - 1
0101 - PROG (Program Input)
0110 - USERA (User Input A)
0111 - USERB (User Input B)
1000 - GPR0
1001 - GPR1
1010 - GPR2
1011 - GPR3
1100 - GPR4
1101 - GPR5
1110 - GPR6
1111 - GPR7
Conditions:
- 000 - NEXT (Goto next line)
001 - GOTO (Goto A)
010 - COND (If {test register} goto A else goto B)
011 - USER (If {user control} goto A else goto B)*
100 - PNEXT (Prompt user, then 000)**
101 - PGOTO (Prompt user, then 001)
110 - PCOND (Prompt user, then 010)
111 - PUSER (Prompt user, then 011)
**Prompt tells the interpreter to halt until the user tells it to continue (ie. with a button)
I'M BAAAAAAACK!
do only reason I can think of is to fill space in, or make it feel more standart/complete. When I do CPU's I try to put only these: ADD, SUB, AND, NOR, shift left and right. Sometimes I do shift left thru program, since it is just two lines of code (one if you have dual read). You could try and make the IS compacter or make use of space somehow, with more useful stuff (not like hardware mul/div but maybe more miscellenous stuff that enchance the user experience and convenience. Other than this, man, such a well designed and conplete IS. I like it, I wish I could design such ISs