DJIS Instruction Set - Printable Version +- Forums - Open Redstone Engineers (https://forum.openredstone.org) +-- Forum: ORE General (https://forum.openredstone.org/forum-39.html) +--- Forum: Projects & Inventions (https://forum.openredstone.org/forum-19.html) +---- Forum: Completed Projects (https://forum.openredstone.org/forum-21.html) +---- Thread: DJIS Instruction Set (/thread-1649.html) |
DJIS Instruction Set - tokumei - 12-19-2013 I came up with my own standardized instruction set for any future CPUs I will build, including ones for REDbit. The instruction set is as follows:
Functions:
Registers:
Conditions:
**Prompt tells the interpreter to halt until the user tells it to continue (ie. with a button) RE: DJIS Instruction Set - xdot - 12-20-2013 How are you going to implement (conditional) branching? RE: DJIS Instruction Set - tokumei - 12-21-2013 (12-20-2013, 04:08 PM)xdot Wrote: How are you going to implement (conditional) branching? That's a good point-mine currently focuses on the part that controls the ALU/registers. I'll add that too. Otherwise, opinions? RE: DJIS Instruction Set - WrytXander - 12-22-2013 I still dont get why people put in XNOR, XOR, NAND and all those in the IS. What, you will plot entire classes on a screen on mc? Not really? You will do parity-check? Heck no ![]() ![]() ![]() RE: DJIS Instruction Set - tokumei - 12-22-2013 @WrytXander You make a lot of good points, but the reason I add those extra functions is to make any common logic gate/function accessible with just 1 line of code. Although there really was no need for for XNOR/NAND, I put them in because they would otherwise take 2 lines of code to perform, which would reduce the performance of the CPU. You could also argue "Where's the left shift," but you can still perform a left-shift with just one line of code. All you have to do to is add the value to itself, which eliminates the need for an explicit left-shift function. RE: DJIS Instruction Set - Cutlassw30 - 01-25-2014 Where is the memory load/store commands?!?! |