12-13-2013, 06:50 PM
(This post was last modified: 12-13-2013, 06:51 PM by properinglish.)
PLA is actually very similar to CLE (which is why they have the same delay). The history behind both of them is actually a fantastic example of what happens when people share ideas and work together (and so I'm going to tell you about PLA in the form of a story!).
While I was experimenting with Ladner-Fisher adders I started doing what I initially called "splitting the NORs", and stumbled upon the idea of combining the first two layers of propagation logic and saving a tick. I showed this to redstonewarrior who wanted to try combining all of the propagation logic and proceeded to build the first CLE (I can remember exactly where he built it on my old RDF plot - it's unfortunate that we don't have that model anymore - it'd be a nice piece of history). RSW's first design was flat, so signal extension got in the way of saving on delay, but then Guy got in on the game and had the brilliant idea of building it diagonally and thus, getting rid of signal extension issues. The main difference between CLE is illustrated here: CLA combines all layers of logic and is optimized in with a short, diagonally staggered structure, and PLA only combines the first two and uses a more traditional flat structure. At this point, CLE was faster than PLA.
The next speed advance came when I realized that it was possible to control propagation using NOR rather than XNOR which, as we all know, are one and two ticks respectively. I applied this by splitting the first half adder so that it had isolated NOR, AND, and XNOR outputs, and saved another tick. This particular trick can be applied to both PLA and CLE, and so both became one tick faster.
The next advance is credited to Darkroom who, when building his first LFA, had a smart idea for how to alternate NOR and NAND layers. This had previously been an issue because of the complications that arrise when dealing with an inverted carry. Darkroom had the idea of simply plugging the carry into the NAND gate so that a carry signal would turn it on. After seeing this, I added it into PLA to save an additional tick. CLE doesn't need to use anything but NOR in the carry logic, so this one didn't apply there, but it did bring PLA up to the speed of CLE (5 ticks at this point).
This next advance was never really used, but it's another great example of collaboration. Prior to the release of comparators I had been playing with ways to combine the NAND layer of the PLA with the final XOR and save a tick and managed to develop some convoluted logic that would do just this, and bring PLA to 4 ticks. The problem was, this logic was REALLY FREAKING CONVOLUTED and putting it into a two-wide format would be a tremendous challenge. I showed Henke (who had also become very interested in the CLA development craze) what I was doing and he took on the challenge of making it two wide - when I got home from work later that day he had built some insanely impressive circuitry that accomplished this goal. We never really got around to attaching it to an adder because shortly after this comparators were released, allowing for an easy 1 tick XOR.
I think it's absolutely awesome that we have these two variations on fast solid-state adders that are each suited to different situations and I thinking back to their development puts a smile on my face because of what we were able to accomplish by working together and sharing ideas. That's what I see as the true spirit of our community.
I have at least one great reference that should help you understand floating point addition and subtraction, but I have get some DNA prepped for sequencing, so I'll find and post that later!
Btw - RSW and I have some plans to get the hardcore redstone going again!!!
While I was experimenting with Ladner-Fisher adders I started doing what I initially called "splitting the NORs", and stumbled upon the idea of combining the first two layers of propagation logic and saving a tick. I showed this to redstonewarrior who wanted to try combining all of the propagation logic and proceeded to build the first CLE (I can remember exactly where he built it on my old RDF plot - it's unfortunate that we don't have that model anymore - it'd be a nice piece of history). RSW's first design was flat, so signal extension got in the way of saving on delay, but then Guy got in on the game and had the brilliant idea of building it diagonally and thus, getting rid of signal extension issues. The main difference between CLE is illustrated here: CLA combines all layers of logic and is optimized in with a short, diagonally staggered structure, and PLA only combines the first two and uses a more traditional flat structure. At this point, CLE was faster than PLA.
The next speed advance came when I realized that it was possible to control propagation using NOR rather than XNOR which, as we all know, are one and two ticks respectively. I applied this by splitting the first half adder so that it had isolated NOR, AND, and XNOR outputs, and saved another tick. This particular trick can be applied to both PLA and CLE, and so both became one tick faster.
The next advance is credited to Darkroom who, when building his first LFA, had a smart idea for how to alternate NOR and NAND layers. This had previously been an issue because of the complications that arrise when dealing with an inverted carry. Darkroom had the idea of simply plugging the carry into the NAND gate so that a carry signal would turn it on. After seeing this, I added it into PLA to save an additional tick. CLE doesn't need to use anything but NOR in the carry logic, so this one didn't apply there, but it did bring PLA up to the speed of CLE (5 ticks at this point).
This next advance was never really used, but it's another great example of collaboration. Prior to the release of comparators I had been playing with ways to combine the NAND layer of the PLA with the final XOR and save a tick and managed to develop some convoluted logic that would do just this, and bring PLA to 4 ticks. The problem was, this logic was REALLY FREAKING CONVOLUTED and putting it into a two-wide format would be a tremendous challenge. I showed Henke (who had also become very interested in the CLA development craze) what I was doing and he took on the challenge of making it two wide - when I got home from work later that day he had built some insanely impressive circuitry that accomplished this goal. We never really got around to attaching it to an adder because shortly after this comparators were released, allowing for an easy 1 tick XOR.
I think it's absolutely awesome that we have these two variations on fast solid-state adders that are each suited to different situations and I thinking back to their development puts a smile on my face because of what we were able to accomplish by working together and sharing ideas. That's what I see as the true spirit of our community.
I have at least one great reference that should help you understand floating point addition and subtraction, but I have get some DNA prepped for sequencing, so I'll find and post that later!
Btw - RSW and I have some plans to get the hardcore redstone going again!!!