Cool trick with the observers and rails, gotta remember that!
but: If I am not mistaken, that one cant read and write at the same time, because on writing, "ghost" outputs may appear, unless you keep powering the OutputEnable line, in which case it would take 2 ticks to read.
I have seen similar to mine, but never the same (unless I missed something), all either used the comparator to make it smaller by the signal strength shenanagins, or to be able to put the output on a common stack without them interfereing, and not to compensate for the loss in signal strength on the OutputDisable line.
Also, if that is 1 tick write, then mine is 1 tick read and write (plus mine does not invert). But I'm confused at this point, in my testing, I needed a 2 tick long pulse to write, as a 1 tick wont unpower the side comparator, am I misunderstanding something here?
edit: okayy, the side comparator needs 2 tick pulse, the one that actually stores the info only needs 1 tick. That can be done, but that may include some extra latency controller side.
but: If I am not mistaken, that one cant read and write at the same time, because on writing, "ghost" outputs may appear, unless you keep powering the OutputEnable line, in which case it would take 2 ticks to read.
I have seen similar to mine, but never the same (unless I missed something), all either used the comparator to make it smaller by the signal strength shenanagins, or to be able to put the output on a common stack without them interfereing, and not to compensate for the loss in signal strength on the OutputDisable line.
Also, if that is 1 tick write, then mine is 1 tick read and write (plus mine does not invert). But I'm confused at this point, in my testing, I needed a 2 tick long pulse to write, as a 1 tick wont unpower the side comparator, am I misunderstanding something here?
edit: okayy, the side comparator needs 2 tick pulse, the one that actually stores the info only needs 1 tick. That can be done, but that may include some extra latency controller side.