03-29-2017, 06:26 PM
(This post was last modified: 03-29-2017, 06:34 PM by GISED_Link.)
(03-27-2017, 08:04 AM)PNWMan Wrote: Basically:
- 2's complement overflow occurs if adding 2 similarly signed numbers results in a different sign.
- To detect overflow, see if the XOR of the Couts of the 2 MSBs is 1.
- Overflow will never occur when adding 2 differently signed numbers.
- This type of overflow is different from just the Cout.
If we go a bit further with those flags :
With 8 bit register
I don't really understand why in the last addition the falg N is set ...
source : https://paws.kettering.edu/~jkwon/teachi...umbers.pdf