Division In Analog

[Apocryphan]

Well, I finally got around to starting this, i've had a rough draft in my head for about a month until I was driving back out west for the week, pondering my multiplier input and then I realized the trick is to loop it and subtract 2 each cycle to split an analog signal into 2 values. this is when it hit me, the same applies when dividing larger numbers and whenever the signal doesn't have a full value to cycle again it will get put into a memory cell as the remainder. This is only my Concept test model, I can derive the correct numbers with this but i know with a little rearranging I won't have to do as many steps to get it.



left of the lamps is a basic divide by 4 loop, when you pulse 9 into the loop it will loop twice and then output 1, with this we can catch and output 2 1/4. The larger display is my prototype, the top lamp display shows the remainder, 2nd lamps show the divisor, 3rd lamps show the dividend, and 4th lamps show the quotient, now this isn't as cut and dry yet, this is showing the answer for 13/3, so to get the right output the remainder must be subtracted to get 4 1/3, 14 will show the same but a remainder of 1 instead of 2. I was looking to use some math tricks i learned but this may end up being faster if i can split larger division into alot of smaller dividers sharing the load. I hope to make a universal/adjustable divider so i don't have to make 10 different sizes >_<



Super fast splitter uses a 2 comparator loop that subtracts 1 on each side, and will adjust a 1-tick balancing memory cell, outputs are compared in the middle to give an output when odd.

[LordDecapo]

so great! how much time would that take to divide 2 8bit (so 2 hex digit) values?

[Apocryphan]

I'm still playing around with how to compact, adjust and organize it, but fairly fast, it'd be nice if i can use a 2 comparator loop to speed this up, i want it to be able to divide an 8 digit ACD by 2 digits, but i can see more than one way of doing it in my head, but I'll definitely update you with all the ways this can and will end up. you can count on it, but I also want to put some time towards finishing something. 5 posts in progress and i hope to have at least 1 done in a decent time frame. It's hard to move on when i know there is a smaller or faster way... I think a few pieces are "done" but then it starts all over again. I start flipping signals and adjusting switches and then I just black out and wake up with a comparator in my hand and a bunch of red dust around my mouth.

[Frontrider]

Having the output on the side of the input is a good starting point in making it more compact.

[LordDecapo]

It's hard to move on when i know there is a smaller or faster way...

THIS... this RIGHT HERE... is the bane of my existence on ORE... I am on my 13th rendition of the same Computer Project (formally called SexiButterfly, now called IizR). And I change a bunch of stuff in the middle of making those old and the newest versions. just last night I changed the way I'll decode my ops. To better take advantage of my pipeline.

[Apocryphan]

After trying something a little different, looking at this from a different angle and under a different light. I think i've found a way to make hex analog division work with larger numbers, this method can be adjusted for numbers larger than 2 digits as well. I will try my best to explain it for you. any explanations amid the process shall be italicized.

So to start we want to divide the 2 hex digits AB by 2 hex digits XY AB/XY=MN



didn't like your list layout =P

although there is a major flaw using a repeat check, the first repeat can be up to 15 times, this can be fixed by increasing stages. And we can determine the most effecient with some simple math once i get some numbers to go off of.

Max amount of checks (excluding final stage and starter checks)

4 stages: y0, 8xy, 4xy, xy
# of checks: 15,1,1,3
-max: 20 moves

5 stages: 4y0, y0, 8xy, 4xy, xy
# of checks: 3,3,1,1,3
-max: 11 moves

6 stages: 8y0, 4y0, y0, 8xy, 4xy, xy
# of checks: 1,1,3,1,1,3
-max: 10 moves

8 stages: 8y0, 4y0, 2y0, y0, 8xy, 4xy, 2xy, xy
# of checks: 1,1,1,1,1,1,1,1
-max: 8 moves

so determine efficiency i just need to get some timing speeds.
C=ticks per check
S=ticks per stage shift
T=ticks per subtraction

4 stage: 20C + 4s + 20T
5 stage: 11C + 5s + 11T
6 stage: 10C + 6s + 10T
8 stage: 8C + 8s + 8T

Just a guess but if i can keep the stage shift ticks to a minimum, 8 stages will pay off. working on implementing the multipliers and check circuits is another story. some wont add delay and some may be quicker to just put through and check false on a major compare rather than on a minor redundancy check.

[Apocryphan]

Another method I'm looking into does use the rapid subtract. and only 1 comparator tick per subtract, and giving the remainder. no adjustments to divide by 2, any adjustment to the comparator will add to 2. With proper timing I believe it is possible to determine the tick length to equal the loop count, and even use these to determine common denominators and simplify fractions.

Odd or Even
Divide by 2, so in about 8 ticks it can take an input of 15 and tell you it is odd, 8 ticks is the max duration for any input (division loop only, relative to 1/2 input value), basic implies gate to trigger when the loop ends on odd, uses a conjoined version with a falling edge detector to signal when the output is ready. I borrowed a balanced ternary circuit to trigger 0 if even and 2 if odd. output is a 2 tick signal.







Divisible by 3 (adjustable)
This is the same loop, only with a 1 plugged into the side of the comparator, the comparator flows so the subtraction would happen after the expected 2, so that those 2 will be the 1st and 2nd wire after each loop instead of the last. this gives us the option to pull the 1st wire and set it as the remainder if its less than the divisor.



or there are always larger options for more accessible triggers, right row is 4,5,6 subtractive loops
and left row is 7 and 9.



The loop count timing is simple in a sense, if it loops once the clock duration is the input duration, the standard being 2 ticks (i may attempt a 1tick input, should work fine). Every additonal loop will add 1 tick to the clock duration, so it all comes down to clock duration - 1 = loop count.

[Apocryphan]

^ Here is a completed version of an adjustable one. The hopper on the left is the input for the divisor, the other hopper is the input for the dividend. This loops the dividend to the left when it can be divided, looping it back to add 1 to a counter and subtract from the dividend until it has less than enough to divide, the right side will detect the remainder, pass it, and seal the ouput.

[josh03222]

that bump

[newomaster]

Very nice work! That's speaking for the original work and dat bump. Analog division is something I thought about a while but never actually got around to working on, so it's awesome to see someone actually accomplish it.

[Apocryphan]

thanks, there's not much original work left because of you, your like the P Diddy of redstone, everytime i wanna make something original, "Newo did it". My next step is to take it further using this long division trick i found on youtube, https://www.youtube.com/watch?v=7cBRXayBNr4