01-29-2019, 04:12 AM
A slight bump to the thread:
1) I realize that even though I could implement some of the ideas in the first post, some of them would cause more headache than good.
2) I've started to document explanations of various components and operations, for my sake as well as anyone who ends up following this progress. All documents are currently held in this folder: https://drive.google.com/open?id=1KnqPfz...bBz9obF9Iy
Currently I've started documenting my planned synchronization methods across the CPU, as well as my planned implementation of hardware level interrupts.
Keep checking that folder, as even though I plan to update this post as I go, I might forget, or it might be a couple of days before I post the progress. Like I said, feedback is super important, so please feel free to point out any potential issues or shortcomings you might see
1) I realize that even though I could implement some of the ideas in the first post, some of them would cause more headache than good.
2) I've started to document explanations of various components and operations, for my sake as well as anyone who ends up following this progress. All documents are currently held in this folder: https://drive.google.com/open?id=1KnqPfz...bBz9obF9Iy
Currently I've started documenting my planned synchronization methods across the CPU, as well as my planned implementation of hardware level interrupts.
Keep checking that folder, as even though I plan to update this post as I go, I might forget, or it might be a couple of days before I post the progress. Like I said, feedback is super important, so please feel free to point out any potential issues or shortcomings you might see