03-10-2015, 10:01 PM
glad to help.
also state-machines arent something i have looked too far into, i know the concepts, but i havent looked over any system layout in depth so i may not be THAT much help on that aspect unless i do some more homework lol
that idea for variable length inst is a great idea! i briefly had an idea like that,, like the first stage decodes the ops and if its a 2 line, it loads the next one in a separate buffer (register) so it only adds that stage when needed.
i got as far with that idea as i said there, i got distracted at work and ended up just thinking of my current idea before i remembered that one again xD (Blame it on my ADHD hahah)
5 cycles is a great goal
also state-machines arent something i have looked too far into, i know the concepts, but i havent looked over any system layout in depth so i may not be THAT much help on that aspect unless i do some more homework lol
that idea for variable length inst is a great idea! i briefly had an idea like that,, like the first stage decodes the ops and if its a 2 line, it loads the next one in a separate buffer (register) so it only adds that stage when needed.
i got as far with that idea as i said there, i got distracted at work and ended up just thinking of my current idea before i remembered that one again xD (Blame it on my ADHD hahah)
5 cycles is a great goal