Beta 1.4_01 CPU

[Kernul_Sanders]

This is a fully working Minecraft redstone CPU built in Minecraft Beta 1.4_01.

Specifications:

16 Bit ALU (!A, !B, CC, Cin, Flood Carry)
6 Bytes Dual Read Registers
6 Bytes RAM
64 Bytes Program Memory (16x16x2 Bits)
16 Bit OP Code

Instruction Set Specifications:

0 00 000 00 0000 0000 Rest
1 00 000 00 0000 0000 Clock Enable
0 01 000 00 0000 0000 Memory MUX
0 10 000 00 0000 0000 Arithmetic MUX
0 00 001 00 0000 0000 Register 01
0 00 010 00 0000 0000 Register 10
0 00 011 00 0000 0000 Register 11
0 00 100 00 0000 0000 RAM 01
0 00 101 00 0000 0000 RAM 10
0 00 110 00 0000 0000 RAM 11
0 00 000 01 0000 0000 Write to Register / RAM
0 00 000 10 0000 0000 Read to Line A
0 00 000 11 0000 0000 Read to Line B
0 00 000 00 0000 0000 Data Values to be Written in Registers / RAM
0 00 000 00 0000 0000 Conditional Branching
0 00 001 00 0000 0000 SUB
0 00 010 00 0000 0000 XOR
0 00 011 00 0000 0000 XNOR

I have also invented a serial data processor that will be used in the finished CPU.





CPU:






Instruction Set:

[Nickster258]

Interesting that you went 16 bit with an old style.

Can't wait to see how it turned out!

[greatgamer34]

Is it an RCA?

[Kernul_Sanders]

Yeah, I used a modified version of Nickster's adder design. I didnt want to make the bits 2 wide because then the alu would be too slow.

---

Interesting that you went 16 bit with an old style.

Can't wait to see how it turned out!

Thanks! And yeah I've been looking at a bunch of older CPUs and all the huge ones were 16 bit. I wanted to see if they really needed to be that big and slow.

[EDevil]

just go with lfa then... rca will fuck it up

[RandOMFG]

This is very interesting. Why did you decide on beta 1.4 though? I imagine the repeaters must've been quite buggy back then.

[Kernul_Sanders]

1.4 was when I started playing Minecraft, so I wanted to bring back old memories. Also, the repeaters are quite buggy in my instruction set!

[Kernul_Sanders]

I've added a video.

[greatgamer34]

I think you might be confused on what an IS is. Having rom is not an IS. Designing OP codes that need to be decoded, along with where you IMM will go and what registers to use is an IS. Not your ROM.

[Nickster258]

I think you might be confused on what an IS is. Having rom is not an IS. Designing OP codes that need to be decoded, along with where you IMM will go and what registers to use is an IS. Not your ROM.

I've seen times were the ROM has registers in its place. It isn't usable as registers/RAM but is much better as an easy way to write lines. One can stay in one spot and program them machine and change the programs easily without moving from the I/O.

[greatgamer34]

I think you might be confused on what an IS is. Having rom is not an IS. Designing OP codes that need to be decoded, along with where you IMM will go and what registers to use is an IS. Not your ROM.

I've seen times were the ROM has registers in its place. It isn't usable as registers/RAM but is much better as an easy way to write lines. One can stay in one spot and program them machine and change the programs easily without moving from the I/O.

No, im commenting on the fact that on the build server, Kernul said he had a 64 BYTE IS! Which is not true...

[Nickster258]

I think you might be confused on what an IS is. Having rom is not an IS. Designing OP codes that need to be decoded, along with where you IMM will go and what registers to use is an IS. Not your ROM.

I've seen times were the ROM has registers in its place. It isn't usable as registers/RAM but is much better as an easy way to write lines. One can stay in one spot and program them machine and change the programs easily without moving from the I/O.

No, im commenting on the fact that on the build server, Kernul said he had a 64 BYTE IS! Which is not true...

Oh damn. I didn't notice that. Yes, I doubt your IS is 512 bits wide. The lines of program memory is not usually taken into account when measuring the IS.

[Kernul_Sanders]

My IS has OP codes... And there are 16 lines of ROM memory and 16 lines of register memory. And there are 512 bits of memory.

[Nickster258]

My IS has OP codes... And there are 16 lines of ROM memory and 16 lines of register memory. And there are 512 bits of memory.

Well, the IS isn't measured by how many bits of memory. Simply the width of the instructions. One could have 512 lines or 16 lines, doesn't change the IS at all.

[Cutlassw30]

only 512 bit IS I have seen is a VLIW processor.

Here is a good example of a IS from the MOS-6502 processor: http://www.masswerk.at/6502/6502_instruction_set.html