01-18-2014, 04:03 AM
WARNING: The challenge described below is not guaranteed to be possible to complete. Attempt at your own peril.
For the past few weeks I've been working on new GPU components and something that I've wanted, but have been unable to build is a 4x4x4 solid-state and repeater-lock based RAM cell. I've got a bunch of great 4x4x5 designs, but 4x4x4 has remained elusive. At this point, I'm not even sure it's possible, but I'm turning to the ORE community to see if anyone can come up with a design! Here's what you need to know:
1. It must be solid-state (no pistons) and use repeater-lock memory.
2. It must be stackable in ALL directions - that means left/right, front/back, and top/bottom stackability.
3. Inputs must be as described:
a. The data input and output lines must be parallel.
b. The read and write control lines must be parallel.
c. The lines in a. must be perpendicular to those in b.
4. The only acceptable delay between cells is for signal extension. Repeaters, comparators, and torches may not be used as easy insulation. Remember that in RAM you want to be able to access all of your data very quickly - that's why this rule exists.
Helpful Tip: Just because the cell has to stack as if it's 4x4x4, it does not need to be a 4x4x4 unit. It is perfectly acceptable for cells to overlap as long as the end result is 4x4x4 stackable in all directions.
This should be all the information you need, but if I think of anything else I will update this post. Good luck!!!
For the past few weeks I've been working on new GPU components and something that I've wanted, but have been unable to build is a 4x4x4 solid-state and repeater-lock based RAM cell. I've got a bunch of great 4x4x5 designs, but 4x4x4 has remained elusive. At this point, I'm not even sure it's possible, but I'm turning to the ORE community to see if anyone can come up with a design! Here's what you need to know:
1. It must be solid-state (no pistons) and use repeater-lock memory.
2. It must be stackable in ALL directions - that means left/right, front/back, and top/bottom stackability.
3. Inputs must be as described:
a. The data input and output lines must be parallel.
b. The read and write control lines must be parallel.
c. The lines in a. must be perpendicular to those in b.
4. The only acceptable delay between cells is for signal extension. Repeaters, comparators, and torches may not be used as easy insulation. Remember that in RAM you want to be able to access all of your data very quickly - that's why this rule exists.
Helpful Tip: Just because the cell has to stack as if it's 4x4x4, it does not need to be a 4x4x4 unit. It is perfectly acceptable for cells to overlap as long as the end result is 4x4x4 stackable in all directions.
This should be all the information you need, but if I think of anything else I will update this post. Good luck!!!
read mechanism is just not very efficient.