An alternative ALU competition - Printable Version +- Forums - Open Redstone Engineers (https://forum.openredstone.org) +-- Forum: ORE General (https://forum.openredstone.org/forum-39.html) +--- Forum: School Discussion (https://forum.openredstone.org/forum-51.html) +--- Thread: An alternative ALU competition (/thread-15128.html) |
An alternative ALU competition - MCCreeper8890 - 04-21-2019 I am well aware that IAmLesbian already has an ALU competition. I'm just trying something different with mine. Mine is NOT meant to replace his, we focus on different things. Les cared about creative and original ALUs, but I'm going for efficiency. Let's set up some basic guidelines for the competition: No ALUs shall ever use instant wire or HSS (High Signal Strength) hex logic for any components. All ALUs must fit within 20x20x20 blocks, and be 8 bits wide. They must offer a carry and zero flag, and hold the same five control inputs: Invert A/B, OR, Carry In, and Flood Carry. Your ALUs, once finished (you have a 3-day construction and testing period) will be tested on the following criteria: - Size: The smaller the better! - Throughput: The ALU must take less than one second between inputs. If your ALU is too slow, it is disqualified! - Latency: The ALU must take less than one second to produce an output. If your ALU is too slow, it is disqualified! - Comprehensive: * Your ALU's inputs must be lined up naturally (without bulky busing) (excluding control inputs) * Your ALU's outputs must be lined up naturally (without bulky busing) (excluding flags) * Your ALU's circuitry must be understood by the host (me) in less than an hour. People who use your designs need to know how it works! If you want to, you can look at the previous winners of the competition as inspiration, but you can NOT directly copy them. If you copy them (discovered through cross section of a clone against a clone of the winners) you are DISQUALIFIED! When the competition is all said and done, the winning design of each (monthly) competition will be added to a display area in the plot. Hence the name: BPoALU (Bluestone's Plot of ALUs) |