(10-27-2013, 01:04 PM)Iceglade Wrote: Sounds very nice! But why 61 bits, when you could just skip straight to 64 and have a nice 2^n?

(12-12-2013, 03:21 AM)Chibill Wrote: Not java please.

(10-27-2013, 01:52 AM)Halflife390 Wrote: Hello My Fellow Redstoners

Hello and welcome to my thread about my first major project on the server!

The HCP V2 - Half.corp Computing Platform Version 2 (Version 1 was my first CPU)

Intro

For those of you who don't know, I joined the server about 2 months ago and so im relatively new. I have made many interesting redstone creations in my singleplayer world and my own server. The best creation was a 16 bit CPU about 6 months ago and I have now decided to make a new one. For infomation on my first CPU then kook at my app here - http://openredstone.org/forums/showthread.php?tid=1202)

My new CPU is going to be a lot better than the last one and it will have way more features.

The HCP V2

First of all it won't even be a CPU, it will be a computer. Technically, CPU's internal registers are not RAM, just temporary storage. My computer will have 16 those registers and also stacks and stacks of RAM. What will make my computer different to others is that it will be designed and modelled exactly like a real computer. This design is called Von Neumann and I believe only about 5% of redstone computers made in minecraft are this architecture, the rest use the harvard architecture. In fact I am reading a really interesting book about the CPU architecture and designing it strongly off the design in the book but with my own modifications. Once I have finished the CPU I will then upgrade it into a computer.

My computer should also have a type of harddrive where many programs will be stored, the program chosen can be loaded into RAM before being executed by the CPU.(EDIT: I'm not making the hard drive now as it server no real purpose as programs can just be stored in the RAM) It will also have some kind of screen and possibly a GPU (That depends on whether it has engulfed half the world :))

Specs:

- HCP V2 = Half.corp Computing Platform V2 (V1 was used in my first CPU)
- Von Neumann Architecture
- Runs the RedSet V2
- 8 Bit ALU (May expand after completion)
- ALU can perform Addition, subtraction (Negative support) All 18 logic operations - NOT, OR, NOR, AND, NAND, XOR, XNOR, IMPLIES, NOT IMPLIES, CONVERSE IMPLIES, CONVERSE NOT IMPLIES, NEGATION, CONVERSE NEGATION, PROJECTION, CONVERSE PROJECTION, IDENTITY, TRUE, FALSE. Shift and Rotate left and right, full comparator (A=B, A>B, A<B)
- Handle negatives (without sacrificing positive numbers)
- Many I/O devices will be attached after completion (Example 3x7 segment screens)
- 128 RAM addresses for 20 bit instruction words, this equals 320 bytes of total RAM. 28 addresses of it will be ROM (For the BIOS system I plan to add)
- Conditional and Unconditional jump instruction decided by 6 ALU flags (A=B, A>B, A<B, Zero, Carry Out, Negative)
- Based on a real CPU design
- RISC Instruction set
- 20 bit Instruction Words
- 16, 8 bit General Purpose Registers
- Not pipelined (Its Von Neumann so its hard!)
- Clock speed - Currently = 100 tick/ 10 seconds. I hope to cut this in half by the time debugging is finished. (Im focusing on efficiency and capability rather than speed)
- 7-8 steps in the stepper (No program counter) = Instruction cycle = 35 or 40 seconds.
- Overclocking Capabilities ( Some kind of interface to raise clock speed but risk cutting out instructions)
- Large I/O bus for adding devices like keyboard, GPU, printer, VDU (All of which I have plans on adding!)
- MAY after completion make an assembler so you can write in ASCII words and they will be decoded into machine code (Not really been done before)
- Will be hooked up to "The Network" (Me and some guys on the server are planning on adding network cards to our cpu's and connecting them to a router so we can transfer data.
- Is MASSIVE and so far covers half my plot!
- More specs will be added later

I have half of the IS wrote out and will soon be uploaded here for those of you who wish to see it.

Current Progress

Currently the computer is nearly done! All of the registers are there, the ALU, Bus and RAM are complete! The final thing that needs to happen before I can test the computer is to finish the Control Unit (CU) wiring. Once that is done I can start coding many thing in and start on I/O! I have made two youtube videos on this project and they are on my channel, pictures will be added next time I update this thread!

Future Plans

I have loads of plans for the future of this computer. Firstly I will make lots of programs and make sure they all work. But after the computer is finished it will not be complete. That will be a huge chunk of the work done but much more needs to be added. Here is a few of these things:

An I/O bus - For connecting any input / output devices.

Keyboard - For typing in letters

GPU - For displaying images and results of calculations, word processor. (I don't know much about GPU's atm so I will need to learn more before I can try this)

Speakers/Sound card - Why not? It'll be interesting to try but not on the top of the priority list.

Printer - For printing blocks that have been made by a program like paint on the GPU

Network Card and Router - As mentioned above I and other have decided to develope a kind of network where people can send data from one CPU to another using the router.

USB Ports - Just some simple serial ports for adding extra devices without needing large buses.

Assembler - As mentioned above I have some very clever ideas on how to make a assembler and an assembly language. I would code the computer using english words and then the cpu will run a program that will decode them into machine code. Me and Wrubbel were having a interesting conversation today about how we could use this for different computers to share one single IS. He also asked me about coding a virtual machine in RAM to facilitate this idea! I have also heared about the guy who made RedGame and how he attempted to make an assembler. Cant wait to take a crack at this one!

Updates


EDIT: Lots of stuff has been changed to this thread! (Some time ago)

EDIT: Lots more stuff has been changed to this thread! (10/12/13 English)

Firstly thankyou for reading this wall of text! If any of you have any questions or suggestions on any aspect of my computer or any of my future projects or if you would like to get involved in anything listed here, please, just drop a comment below and I will reply quickly as I always have this open in another tab.

I will next update this thread when I have finished the CU and ran a few programs. Hopefully I will have a few picture by then as well!
:D

(10-27-2013, 01:52 AM)Halflife390 Wrote: Hello My Fellow Redstoners

Hello and welcome to my thread about my first major project on the server!

The HCP V2 - Half.corp Computing Platform Version 2 (Version 1 was my first CPU)

Intro

For those of you who don't know, I joined the server about 2 months ago and so im relatively new. I have made many interesting redstone creations in my singleplayer world and my own server. The best creation was a 16 bit CPU about 6 months ago and I have now decided to make a new one. For infomation on my first CPU then kook at my app here - http://openredstone.org/forums/showthread.php?tid=1202)

My new CPU is going to be a lot better than the last one and it will have way more features.

The HCP V2

First of all it won't even be a CPU, it will be a computer. Technically, CPU's internal registers are not RAM, just temporary storage. My computer will have 16 those registers and also stacks and stacks of RAM. What will make my computer different to others is that it will be designed and modelled exactly like a real computer. This design is called Von Neumann and I believe only about 5% of redstone computers made in minecraft are this architecture, the rest use the harvard architecture. In fact I am reading a really interesting book about the CPU architecture and designing it strongly off the design in the book but with my own modifications. Once I have finished the CPU I will then upgrade it into a computer.

My computer should also have a type of harddrive where many programs will be stored, the program chosen can be loaded into RAM before being executed by the CPU.(EDIT: I'm not making the hard drive now as it server no real purpose as programs can just be stored in the RAM) It will also have some kind of screen and possibly a GPU (That depends on whether it has engulfed half the world :))

Specs:

- HCP V2 = Half.corp Computing Platform V2 (V1 was used in my first CPU)
- Von Neumann Architecture
- Runs the RedSet V2
- 8 Bit ALU (May expand after completion)
- ALU can perform Addition, subtraction (Negative support) All 18 logic operations - NOT, OR, NOR, AND, NAND, XOR, XNOR, IMPLIES, NOT IMPLIES, CONVERSE IMPLIES, CONVERSE NOT IMPLIES, NEGATION, CONVERSE NEGATION, PROJECTION, CONVERSE PROJECTION, IDENTITY, TRUE, FALSE. Shift and Rotate left and right, full comparator (A=B, A>B, A<B)
- Handle negatives (without sacrificing positive numbers)
- Many I/O devices will be attached after completion (Example 3x7 segment screens)
- 128 RAM addresses for 20 bit instruction words, this equals 320 bytes of total RAM. 28 addresses of it will be ROM (For the BIOS system I plan to add)
- Conditional and Unconditional jump instruction decided by 6 ALU flags (A=B, A>B, A<B, Zero, Carry Out, Negative)
- Based on a real CPU design
- RISC Instruction set
- 20 bit Instruction Words
- 16, 8 bit General Purpose Registers
- Not pipelined (Its Von Neumann so its hard!)
- Clock speed - Currently = 100 tick/ 10 seconds. I hope to cut this in half by the time debugging is finished. (Im focusing on efficiency and capability rather than speed)
- 7-8 steps in the stepper (No program counter) = Instruction cycle = 35 or 40 seconds.
- Overclocking Capabilities ( Some kind of interface to raise clock speed but risk cutting out instructions)
- Large I/O bus for adding devices like keyboard, GPU, printer, VDU (All of which I have plans on adding!)
- MAY after completion make an assembler so you can write in ASCII words and they will be decoded into machine code (Not really been done before)
- Will be hooked up to "The Network" (Me and some guys on the server are planning on adding network cards to our cpu's and connecting them to a router so we can transfer data.
- Is MASSIVE and so far covers half my plot!
- More specs will be added later

I have half of the IS wrote out and will soon be uploaded here for those of you who wish to see it.

Current Progress

Currently the computer is nearly done! All of the registers are there, the ALU, Bus and RAM are complete! The final thing that needs to happen before I can test the computer is to finish the Control Unit (CU) wiring. Once that is done I can start coding many thing in and start on I/O! I have made two youtube videos on this project and they are on my channel, pictures will be added next time I update this thread!

Future Plans

I have loads of plans for the future of this computer. Firstly I will make lots of programs and make sure they all work. But after the computer is finished it will not be complete. That will be a huge chunk of the work done but much more needs to be added. Here is a few of these things:

An I/O bus - For connecting any input / output devices.

Keyboard - For typing in letters

GPU - For displaying images and results of calculations, word processor. (I don't know much about GPU's atm so I will need to learn more before I can try this)

Speakers/Sound card - Why not? It'll be interesting to try but not on the top of the priority list.

Printer - For printing blocks that have been made by a program like paint on the GPU

Network Card and Router - As mentioned above I and other have decided to develope a kind of network where people can send data from one CPU to another using the router.

USB Ports - Just some simple serial ports for adding extra devices without needing large buses.

Assembler - As mentioned above I have some very clever ideas on how to make a assembler and an assembly language. I would code the computer using english words and then the cpu will run a program that will decode them into machine code. Me and Wrubbel were having a interesting conversation today about how we could use this for different computers to share one single IS. He also asked me about coding a virtual machine in RAM to facilitate this idea! I have also heared about the guy who made RedGame and how he attempted to make an assembler. Cant wait to take a crack at this one!

Updates


EDIT: Lots of stuff has been changed to this thread! (Some time ago)

EDIT: Lots more stuff has been changed to this thread! (10/12/13 English)

Firstly thankyou for reading this wall of text! If any of you have any questions or suggestions on any aspect of my computer or any of my future projects or if you would like to get involved in anything listed here, please, just drop a comment below and I will reply quickly as I always have this open in another tab.

I will next update this thread when I have finished the CU and ran a few programs. Hopefully I will have a few picture by then as well!
:D

(10-27-2013, 01:19 PM)Iceglade Wrote: Makes more sense 64 bit might be a bit overkill. Also, how will it be programmed?

(01-09-2014, 11:26 PM)WrytXander Wrote: Man does this look promising. But, there are few things that bugged me a little bit. First comes the logic operations. Having 18 logic op is overkill, kinda useless, and it opposes the idea behind risc. You can have the basic nand, xnor and be good to go. Altought it would take more than a cycle to do other operations, a cpu will use them 1,2% (actual fact from risc research, mostly used operations are OR and AND).
By removing those Operations from the IS, you can have much more space for other stuff (like interrupts, routine calls, rotation, pair registers..)!

Secondly, to me, having unconditional and branch if equal, at the same IS, is very inefficient. You can just test if zero register equals to it self, ehich will always return true. In real life, having as much jumps possible is a nice thing. But in mc, maybe you could have optimized a little bit more!

I guess it is a bit late to change stuff around, but do not get me wrong. Von neumann and signed data and all other fancy stuff looks just great! I hope hearing more about this soon, and maybe a v3?

(01-10-2014, 04:57 AM)himehowareu Wrote: I am working on an OS that can be ran on binary computers I am still coding it and because of how I am codeing it , it is easy to switch CPUs if you want I can build a OS for you the only things I would need would be screen size,GPU interface codes , (when done network interface ) , key board encode ,and the way you want everything to work

Latter on I will make a assembler built in to the OS the only problem is the size of the OS I might have to make a kernal that loads the OS but that is my problem.

PS I will be OK if you say no

(01-14-2014, 06:25 AM)Null Wrote: >Ripple Carry Adders
>Why

(01-14-2014, 09:38 AM)EvilDevil59NL Wrote: Where did you find ripple carry adders in this post?

And if he did use them, its probably because #swag

(01-14-2014, 01:35 PM)Null Wrote:

(01-14-2014, 09:38 AM)EvilDevil59NL Wrote: Where did you find ripple carry adders in this post?

And if he did use them, its probably because #swag

I Sneaked Into His Plot And Found Them In That Computer...

Now I Just Need To Reverse Engineer It... Nya Nya Nya...

(01-14-2014, 02:22 PM)Cutlassw30 Wrote: Still better architecture than ive seen anyone else make. Who gives a flying fuck about implementation the guy is smart. But thats why I sorta dislike this server, everyone only cares about how good something looks and how compact/fast it looks. No one cares about architecture.

(01-14-2014, 06:25 AM)Null Wrote: >Ripple Carry Adders
>Why

(01-14-2014, 02:22 PM)Cutlassw30 Wrote:

(01-14-2014, 01:35 PM)Null Wrote:

(01-14-2014, 09:38 AM)EvilDevil59NL Wrote: Where did you find ripple carry adders in this post?

And if he did use them, its probably because #swag

I Sneaked Into His Plot And Found Them In That Computer...

Now I Just Need To Reverse Engineer It... Nya Nya Nya...

Still better architecture than ive seen anyone else make. Who gives a flying fuck about implementation the guy is smart. But thats why I sorta dislike this server, everyone only cares about how good something looks and how compact/fast it looks. No one cares about architecture.

And even with a 70 tick clock speed and not compact whatsoever. Im going to call this the best computer on the server.

(01-14-2014, 02:22 PM)Cutlassw30 Wrote:

(01-14-2014, 01:35 PM)Null Wrote:

(01-14-2014, 09:38 AM)EvilDevil59NL Wrote: Where did you find ripple carry adders in this post?

And if he did use them, its probably because #swag

I Sneaked Into His Plot And Found Them In That Computer...

Now I Just Need To Reverse Engineer It... Nya Nya Nya...

Still better architecture than ive seen anyone else make. Who gives a flying fuck about implementation the guy is smart. But thats why I sorta dislike this server, everyone only cares about how good something looks and how compact/fast it looks. No one cares about architecture.

And even with a 70 tick clock speed and not compact what so ever. Im going to call this the best computer on the server.

(01-14-2014, 11:38 PM)Halflife390 Wrote:

(01-14-2014, 02:22 PM)Cutlassw30 Wrote:

(01-14-2014, 01:35 PM)Null Wrote:

(01-14-2014, 09:38 AM)EvilDevil59NL Wrote: Where did you find ripple carry adders in this post?

And if he did use them, its probably because #swag

I Sneaked Into His Plot And Found Them In That Computer...

Now I Just Need To Reverse Engineer It... Nya Nya Nya...

Still better architecture than ive seen anyone else make. Who gives a flying fuck about implementation the guy is smart. But thats why I sorta dislike this server, everyone only cares about how good something looks and how compact/fast it looks. No one cares about architecture.

And even with a 70 tick clock speed and not compact what so ever. Im going to call this the best computer on the server.

Ok cut I was explaining this on the server but you had to leave so I can tell you now.

Basicly the clock is a 7 second clock, each clock cycle does 1 step of the stepper. But an instruction like add takes more then 1 step to complete.
Example:

1st step - load value B into the TEMP register
2nd step - load value a into the alu and the temp reg into the alu and add them together
3rd step - save the result into another register

As there is only 1 bus every command must be executed like this, in a series of steps. In each step any register can be read from and saved to but as there is only 1 bus you can only do 1 register at a time, get it?

But, as we want to access the next location in ram to get the next instruction after the current add instruction is finished we want to do a little addition. Now this takes another 3 steps. There is also one final step that resets the stepper back to step 1. In total that = 7 steps every instruction will need to do no matter what it is. So it takes 7 clock cycles to complete one instruction cycle. I know this is very slow but as its von neumann it needs to be like this.