RiSC-16 - Printable Version +- Forums - Open Redstone Engineers (https://forum.openredstone.org) +-- Forum: ORE General (https://forum.openredstone.org/forum-39.html) +--- Forum: Projects & Inventions (https://forum.openredstone.org/forum-19.html) +---- Forum: In Progress (https://forum.openredstone.org/forum-20.html) +---- Thread: RiSC-16 (/thread-7734.html) |
RiSC-16 - CrazyGuy108 - 09-12-2015 Building the famous RiSC-16, the 16bit Ridiculously Simple Computer. Uses piston memory and ICA. Click here for the instruction set. I will be building with very_awesome_guy to sort of teach him how a CPU works. Warp will be set when completed. You can find the CPU somewhere in very_awesome_guy's plot. Data loop: http://imgur.com/gQJ1ZkT,f7Hfu0q,Tf4oxUS,TMjOprI,Twl7Tmg,MjvpEMQ,iRwXm1B Complete with 7 16bit GPRs including sign, as well as a conditional 2's comp converter for both reads. The ALU is ICA based, with only a NAND command as specified by the IS. RE: RiSC-16 - Spidermy9 - 09-15-2015 This is nice. lovely to see some of them computers that i can understand RE: RiSC-16 - Nickster258 - 09-15-2015 Awesome little instruction set, I quite like it. I about made it but decided to take advantage of the null bits in half of the instructions. RE: RiSC-16 - CrazyGuy108 - 09-19-2015 (09-15-2015, 05:40 PM)Nickster258 Wrote: Awesome little instruction set, I quite like it. I about made it but decided to take advantage of the null bits in half of the instructions. I'm interested in what you did with the IS to fill in the null bits. I heard that in a halt instruction in assembly, its supposed to jalr 0,0 and fill in the 6 null bits with some kinda syscall. RE: RiSC-16 - CrazyGuy108 - 09-19-2015 By the way, any RiSC-16 programs that you or the internet comes up with will be useful in testing the CPU. |