16 bit 5 tick torchless ALU with one forwarder for 6 tick CPUs [Diagonal] - Printable Version +- Forums - Open Redstone Engineers (https://forum.openredstone.org) +-- Forum: ORE General (https://forum.openredstone.org/forum-39.html) +--- Forum: Projects & Inventions (https://forum.openredstone.org/forum-19.html) +---- Forum: Completed Projects (https://forum.openredstone.org/forum-21.html) +---- Thread: 16 bit 5 tick torchless ALU with one forwarder for 6 tick CPUs [Diagonal] (/thread-12880.html)

16 bit 5 tick torchless ALU with one forwarder for 6 tick CPUs [Diagonal] - EEVV - 08-06-2017 [Divine intellect warning] I made a 16 bit torchless ALU that uses a modified version of Koy's BCS for the better output->input route. Screenshot: But really, you should `/warp 16bitalu` for the full immersive experience™. [Update: fully functional with 4 tick Bout as of 2017/8/8] Capabilities (if you have the inverters): Addition, subtraction, All logic gates, Disable ALU out, Right shift w/ sign (on forwarding side and non forwarding side), Left shift (on forwarding side only) RE: 16 bit 5 tick torchless ALU with one forwarder for 6 tick CPUs [Diagonal] - estp - 08-21-2017 look nice RE: 16 bit 5 tick torchless ALU with one forwarder for 6 tick CPUs [Diagonal] - Koyarno - 08-22-2017 So, if the shift is only on the forwardable side, shouldnt it be wise to memory map the accumulator to a register too?