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+---- Thread: Comp Sci Roadmap (/thread-12467.html)
Comp Sci Roadmap - Koyarno - 06-19-2017
For people new to computational redstone I give you this: the roadmap for being the ultimate nerd in class.
It starts from the absolute basics to the more advanced concepts used in modern computers.
Please note that topics tagged [OPTIONAL] can be skipped. They will maybe only be mentioned later down the line, but no more than that.
This roadmap is not for people that expect a "how to build my/benny's/newo's cpu" tutorial. I will give you all the knowledge to let you think about your own design decisions for your own projects.
Difficulty range approved by skyrim:
Novice - Anyone new to redstone trying to apply basic logic to survival builds (EG double light switch, timers)
Apprentice - Anyone using basic logic to make more special purpose builds (EG adders, decoders/encoders)
Addept - Anyone configuring special purpose builds to design simple microcontrollers (EG single cycle processing units, word processor)
Master - Anyone optimising builds for pipelining/parallelism and managing hazards (EG multi cycle processing units, routers)
Expert - Anyone complaining about the xor count reaching 3 digits
categories:
logic - bitwise logic
binary - arithmetic logic
memory - state logic
architecture - hardware solutions
coding - software solutions
LOGIC I
OR XOR AND + inversions
BINARY I
Base systems - 9:59 - https://youtu.be/ku4KOFQ-bB4
Binary arithmetic - 6:59 - https://youtu.be/WN8i5cwjkSE\
- Half adder
- Full adder
LOGIC II
- Encoders
- Decoders
MEMORY I
- Latch designs
- Control
BINARY II - Negative binary
16:15 - https://youtu.be/lKTsv6iVxV4
LOGIC III
Multiplexors / demultiplexors
Logic reduction tactics
BINARY III - Carry look ahead types
- PPA
- CLA / CLE
- CCA/ICA
MEMORY II - special registers
- Stack
- Queue
ARCHITECTURE I - generic cpu layout
6:25 - https://www.youtube.com/watch?v=RPQD7-AOjMI
- Instruction ROM
- Instruction decoder
- Dataloop
- Branching
ARCHITECTURE II - Pipelining
5:30 - https://youtu.be/IAkj32VPcUE?t=349
- Latency vs throughput
- Data hazards
- Resource hazards
- Control hazards
MEMORY III - Caching
6:05 - https://www.youtube.com/watch?v=6JpLD3PUAZk
- Set & way associativity
- Sacrifice algorithms
- Prefetching
RE: Comp Sci Roadmap - LordDecapo - 06-22-2017
Love this! Data has a post recently with a link to a playlist of a BUNCH of good videos that could be added to this. I'll go find the playlist link and put here
Edit: https://www.youtube.com/playlist?list=PLdY48wAmI3aCCeRO83bjYrOSQNmrO_hE1
There you go
I'm off work early today (about 4hrs from this posting) so I can get in voice and help you compile and combine the lists of stuffs Also "Expert - Anyone complaining about the xor count reaching 3 digits"
Hahaha! The struggle is so real with that
Edit, edit: just saw u said not to reply... whoops. I'll remove this in a bit xD
RE: Comp Sci Roadmap - Koyarno - 06-22-2017
nono i just delete the posts on monday. Yep the last part is just hard to categorise in difficulty. I do not want it to be strictly linear and all vidoes. Most of it is theory just now - the redstone equivalent later with possibly some of my own explanation.