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Minecraft name: ImaCreeperKaBoom

What do you like the most about redstone?: I like to play around and build awesome stuff weather its useful or not

What's a thing you have made which demonstrates redstone knowledge?: "high functioning" instant carry ALU with all logic and 4 flags without flags its W: 20 L: 20 H: 10 4000 blocks which is the ALU only which is white wool.

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What does the thing do?: 

it can do basic math add, subtract, and multiple. I don't know how to do divide. the actually ALU is white wool the rest is part of my CPU but I'm stuck on some stuff on how to do pipelining for commands I do know how to do ROM programming but I want a more active task schedule model. here is a list of things it has. it is almost ready to be hooked up to a control unit but I'm wanting to learn more about that. hope this is enough I really don't what to re build it Wink

Registers:
A  shift register A  8 bit (red wool)
1 Shift left command
2 Shift right command
3 write register command
4 register = 0 branch

B  Shift register B 8 bit (red wool)
5 Shift left  command
6 Shift right command
7 Write register command
8 register = 0 branch

C  AX register A 8 bit (Purple wool)
9  write command
10 clear command

D  AX register B 8 bit (purple wool)
11 write command
12 clear command

cache

E  L1 8 bit (lime green wool)
11 write command
12 read command

F L2 quazi duel write (Q.D.W.) duel read 8 bit X 6 (light grey wool)
each set can save the same info i.e. set one cell 1 will save also to set two cell 1. but each set can read different. like: write. 1010101 you can save that number to each set at once. but the read allows. read. set one cell 2 111011 and read. set two cell 3 11111.
 set one           set two
13 1 write      19 1 write
14 1 read       20 1 read
15 2 write      21 2 write
16 2 read       22 2 read
17 3 read       23 3 write
18 3 write      24 3 write

External bussing/addressing (blue wool)
E output bussing
25 send from ALU output command
26 send from ALU cache L2 set 1 command (not added yet)


G input bussing
27 send to ALU cache L2 set 1 (not added yet)
28 send to ALU Shift register
29 send to ALU cache L1

I ALU flags (dark grey wool)
30 zero flag
31 sign flag (+-)
32 overflow flag
33 parity flag (even, odd)

J Logic (white wool)
34 AND
35 OR
36 XOR
37 NOT
38 NAND
39 NOR
40 XNOR


Image/s and/or video/s of the device, from imgur.com or youtube.com:
http://imgur.com/sb3wL0r
http://imgur.com/7HMChJF
http://imgur.com/bHCgqOC

Do you agree with the rules?: yes
In your ALU, it seems that there is no adder; which is usually a pretty important part of an ALU. I'd usually deny applications on that, however the fact that this is part of a (WIP) cpu makes it good in my books Smile

Approved for trial! Whenever you're ready, hop onto the build server and ask an admin for a trial.