Forums - Open Redstone Engineers

hi
so i mad this dual core pipe line'd 4 tick latch clock with intelgated cpu and gpu with xy decoder. control unit and 1 bit rom., uses an ica data loop alu
which is connected to the second core and gpu
picture's:

a quick over view with fea't.uring my fan's:


\warp nocpu

first core with ica carry adder and data loop


secon'd core and part of gpu with big resolution display


high tech gpu with fast

almost forgo't to say that swift helped my with this project a bit with the RCA and others were very supportive too thanks

gpu pipe data line with loop buffer latch register


con trol unit,, and clock with 1 bit ROM for bIG user programs!



All attackments are embedded above

can be moved to shenanigans sometime

good job,,, but can't it not run crysis?

I believe this warrants a promotion.

sory i think i counted the corrs wrong, Ha Ha, it is 4 cores (Tripel Core). also this was for my teacher's Tral i asked nick ster if I could trial myselves so welcome to teacher Thank rank!!11

wow........... poepl are building cpus,,,,, ,and i havnet finnished mine yet stop

Can it run minecraft tho

can it run pornhub tho?

wen datablow duel fibb??

probably like 3 months after next hcristmas or something

Dirt with grass! Throwback to theinternetftw’s ALU anno 2011. +100 points